1. Field of the Invention
This invention relates to a planar horizontal type and a planar vertical type semiconductor device, and particularly to a voltage withstanding structure therefor.
2. Description of the Related Art
Power devices represented by a bipolar transistor, a power MOSFET and IGBT (Insulated Gate Bipolar Transistor) requires a voltage withstanding structure (i.e. structure of an area having a withstand voltage) of several tens to several thousands volts. In order to drive these power devices, in recent years, many attempts have been made to develop a high withstand voltage IC. The high withstand voltage IC also requires a withstand voltage substantially equal to the requirement for the power device.
FIGS. 10A and 10B show a composite structure of a Double RESURF structure and a resistive field plate structure. FIG. 10A is a sectional view of the main portion thereof and FIG. 10B is a graph of a potential distribution thereof. This voltage withstanding structure is a typical high withstand voltage IC.
As seen from FIG. 10A, an N-well region 34 is formed in a surface layer of a p-type substrate 35. In a surface layer of this N-well region 34, a high potential region 33, a low potential region 37 and P-offset region 39 are formed. On the high potential region 33 and low potential region 37, a high potential side electrode 32 and a low potential side electrode 38 are formed, respectively. On the dielectric oxide film 41 formed on the p-type substrate 35, a thin film resistive layer 40 is formed which is a resistive field plate having high resistivity. This thin film resistive layer 40 makes an electric contact between the high potential side electrode 32 and low potential side electrode 38. The low potential side electrode 38 is electrically connected to the electrode 36 on the rear side at an end portion of the p-type substrate 35. Reference numeral 35a denotes a p-type substrate layer.
FIG. 10B shows the state of the potential distribution on the chip surface when a high potential Vs is applied to the high potential side electrode 32 with respect to the low potential side electrode 38 (e.g. GND).
The potential distribution has a great distortion at the vicinity of both ends of the resistive field plate 40 where an electric field is concentrated. Accordingly, the withstand voltage is lowered at these portions.
FIG. 11 is a view showing the enlargement of a depletion layer within a semiconductor. The sectional view of the main portion of a semiconductor device shown in FIG. 11 is the same as that shown in FIG. 10A. Therefore, reference numerals in FIG. 11 refer to the same as the reference numerals in FIG. 10A.
In FIG. 11, when the a positive potential Vs is applied to the high potential side electrode 32 with respect to the low potential side electrode 38 and the rear side electrode 36, depletion layers 47 and 48 expand from two p-n junctions which are reverse-biased.
One p-n junction is formed between the N-well region 34 and P-offset region 39 or low potential region 37, and another p-n junction is formed between the N-well region 34 and p-type substrate layer 35a. 
Generally, because of influence of fixed charge at the boundary between the dielectric oxide film 41 and semiconductor, an electric field is liable to concentrate within the depletion layer on the semiconductor surface, which leads to breakdown of the device.
In the resistive field plate structure, when a potential Vs is applied to the high potential side electrode 32, the potential Vs is also applied to the thin film resistive layer 40 so that a current corresponding to the potential Vs and the resistance of the thin film resistive layer 40 flows through the thin film resistive layer 40. Thus, if a uniform potential distribution is generated in the thin film resistive layer 40, the electric field due to this potential distribution affects the semiconductor layer so that the concentration of the electric field within the depletion layer on the surface of the semiconductor layer can be relaxed. This assures the high withstand voltage stably.
In the conventional structure, in order that a large leak current is not generated between the high potential region 33 and low potential region 37, as the thin film resistive layer 40 which is a field plate, a layer having high resistivity of several Mxcexa9 cm, e.g. of non-doped amorphous silicon or oxygen-doped polysilicon (SIPOS) has been adopted.
However, in order to form the high-resistivity layer of several Mxcexa9 cm surely, the impurities invading this layer have to be restricted to a very small quantity, thereby making it difficult to manufacture the device. The value of the resistivity is likely to vary according to positions.
Where the resistance of the thin film resistive layer 40 is low, the variation of the resistance is small. However, because a large leak current flows, a large loss occurs. This lead to breakdown of the device. On the other hand, the resistance of the thin film resistive layer 40 is too high, a variation of the resistance is generated so that the leak current is likely to flow non-uniformly. This makes it difficult to form a uniform electric potential distribution between the high potential region 33 and low potential region 37. This produces an area where the electric field concentrates within the depletion layer of the semiconductor layer. Because of this, a withstand voltage may be lowered.
A proposal for solving these problems is disclosed in JP-A-4-332173 in which, as shown in FIG. 12, the resistance of the thin film resistive layer 40 is reduced to restrict its variation, and the thin film resistive layer 40 is formed in a spiral shape between an island base electrode 43 (high potential side electrode) and a peripheral electrode 44 (low potential side electrode) encircling it so that this long thin film resistive layer (spiral thin film resistive layer 45) connects the base electrode 43 to the peripheral electrode 44, thereby increasing the resistance.
In this structure, the resistivity of the spiral thin film resistive layer 45 is reduced to restrict its variation, and the resistance from end to end of the spiral thin film resistive layer 45 is increased to suppress the leak current. The potential distribution on the segment connecting the base electrode 43 and peripheral electrode 44 in line changes stepwise by the number of times of spiral winding of the spiral thin film resistive layer 45. An increase of the number of times of winding decreases a drop between the steps, thereby making the average potential gradient constant.
The structure described above realizes, as a lower value, the resistivity of the spiral resistive layer 45 electrically connecting the peripheral electrode 44 and base electrode 43 than that of the resistive field plate having the conventional structure. This structure has an advantage of capable of easily controlling the resistivity as compared with the case of the field plate.
However, an increase in the chip size of a semiconductor device when the spiral thin film resistive layer 45 is formed lengthens the length of the spiral thin film resistive layer 45 so that its resistance becomes large. In order to cause the equal leak current to flow irrespectively of the chip size, when the chip size is increased, the width of the spiral thin film resistive layer 45 must be extended. This necessarily increases the width of the voltage withstanding structure arranged in the periphery. Therefore, with the semiconductor device having the same withstand voltage, the width of the voltage withstanding structure must be changed according to its current capacity, i.e. area of an active region. This is inconvenient in production cost when the semiconductor devices in the same withstand voltage series are produced.
Although the value of the resistivity of the thin film adopted as the spiral thin film resistive layer has become settable as a relatively low value, it is still difficult to provide uniform resistivity along the spiral resistive layer. Therefore, the resistance of the spiral thin film resistive layer 45 varies according to its position, and the electric field concentrates locally in the voltage withstanding structure, thereby reducing the device withstand voltage. The resistance greatly varies due to temperature. Accordingly, it is also difficult from the standpoint of assuring reliability to use the spiral resistive layer for a device.
U.S. Pat. No. 5,475,258 proposes to form a Zener diode on a dielectric film between the gate and drain of a power MOSFET. However, this is not sufficient to make uniform the potential distribution between the source and drain.
U.S. Pat. No. 5,729,044 proposes to connect p-type regions and n-type regions formed within a semiconductor substrate by metal to form diodes in series. However, it is difficult to combine this structure with the RESURF structure which has been widely applied in a horizontal type device. Therefore, this structure is not suitable to the horizontal type device.
U.S. Pat. No. 5,382,825 proposes, for a vertical type device, to connect a large number of diodes in series and spirally in an inactive region on the periphery of an active region. However, this reference is silent on arranging such a structure for the horizontal type device and also on the active region. In addition, the number of the diodes connected in series and spirally is selected to define a device in the rated voltage. Therefore, when the voltage in the vicinity of the rated voltage is applied to the device, a large leak current flows disadvantageously.
As understood from the above description, a voltage withstanding structure has not been proposed which can be applied to both horizontal and vertical, formed in a structure composed of a large number of diodes which operates like a field plate, produces a small leak current and can make the potential distribution sufficiently uniform.
An object of this invention is to solve the above problems to provide a horizontal type and a vertical type semiconductor device having a voltage withstanding structure which is difficult to produce concentration of an electric field and has great reliability.
In order to attain the above object, there is provided a semiconductor device comprising:
a first electrode and a second electrode separated from each other on a dielectric film formed on a semiconductor substrate;
a spiral thin film layer having both ends connected to the first electrode and the second electrode, respectively and surrounding the first electrode, the thin film layer being formed on the dielectric layer; and
a plurality of p-n diodes formed in series formed in a longitudinal direction of the spiral thin film layer.
The semiconductor substrate located between the first electrode and the second electrode constitutes an active region through which a main current flows, and the spiral thin film layer is formed above the semiconductor substrate through the dielectric film.
The spiral film layer is made of polysilicon, and first conduction type regions and second conduction type regions are formed alternately in the polysilicon so that these regions constitute p-n junctions.
The spiral thin film layer is made of first conduction type polysilicon, and a plurality of second conduction type are formed selectively at intervals in the first conduction type polysilicon so that the first conduction type regions of the first conduction type polysilicon and the second conduction type regions are alternately formed and constitute p-n junctions.
The p-n diodes are formed in a forward series connection or a reverse series connection within the spiral thin film layer.
Each of the p-n diodes is preferably a Zener diode.
The impurity concentration in each of the first conduction type regions and second conduction type regions is preferably 1xc3x971018 cmxe2x88x923 or higher.
The first conduction type polysilicon is preferably doped with p-type or n-type impurities with a concentration of 1xc3x971018 cmxe2x88x923 or higher.
The dielectric film preferably has a thickness of 0.01 to 10 xcexcm.
Preferably, the semiconductor substrate is of the first conduction type;
a first region having a first conduction type and a second region having a second conduction type are formed apart from each other in an surface layer of the semiconductor substrate;
a third region having the second conduction type is formed in the surface layer of the semiconductor substrate between the first region and the second region so that it is apart from the first region and abuts on the second region; and
the first region is connected to the first electrode, and the second region is connected to the second electrode.
Preferably, the semiconductor substrate is of the first conduction type;
a first region and a second region having a second conduction type, respectively are formed apart from each other in a surface layer of the semiconductor substrate;
a third region having the second conduction type is formed in a ring-shape in the surface layer of the semiconductor substrate between the first region and the second region so that it surrounds the first region; and
the first region is connected to the first electrode, and the second region is connected to the second electrode.
Preferably, assuming that the withstand voltage of the semiconductor device is VB, the breakdown voltage of each of the p-n diodes is Vz, and the number of p-n junctions constituting the p-n diodes in the spiral thin film layer and placed in a reverse blocked state is, VB less than VZxc3x97m
As described above, for example, a plurality of p type regions are formed at intervals in an n type polysilicon so that n type regions and p-type regions are formed alternately. These p type regions and n type regions constitute p-n diodes, respectively. Thus, a structure composed of p1, n1, p2, n2, . . . constitutes the thin film layer. The first pair of p1 and n1 constitutes a first p-n diode, second pair of n1 and p2 constitute a second p-n diode, and third pair of p2 and n2 constitute a third p-n diode. Therefore, the first p-n diode and second p-n diode are connected in reverse-series, and the second p-n diode and third p-n diode are also connected in reverse-series. In short, the thin film layer has a structure in which a plurality of pairs of p-n diodes connected in reverse-series are connected in series.
Where the regions of n1 and p2 are connected by a metallic film, the p-n diodes composed of p1 and n1 and of p2 and n2 are connected in a forward-series. In this case, the thin film layer has a structure in which a plurality of p-n diodes are connected in the forward-series.
In order that these p-n diodes serve as Zener diodes, non-doped polysilicon is doped with first conduction type impurities with a concentration of 1xc3x971018 cmxe2x88x923 or higher to form first conduction type polysilicon. The second conduction type regions with an impurity concentration of 1xc3x971018 cmxe2x88x923 or higher are formed in the first conduction type polysilicon to form Zener diodes. It is estimated that within a range of the impurity concentration of 1018 cmxe2x88x923 to 1019 cmxe2x88x923, an avalanche breakdown and Zener breakdown occur mixedly and with the impurity concentration of 1019 cmxe2x88x923 or higher, the Zener breakdown occurs dominantly.
By connecting the Zener diodes in series (reverse-series or forward-series) to constitute the spiral thin film layer, a uniform potential distribution can be obtained on the line segment coupling the first electrode and second electrode, thereby preventing the electric field from being concentrated.
FIG. 5 is a graph showing the voltage/current characteristic of the Zener diode made of polysilicon. In a reverse-biased region, when the reverse voltage for the p-n junction is increased, a breakdown phenomenon that a current flows abruptly at a prescribed voltage (Zener voltage: Vz) appears. In the spiral thin film layer composed of the Zener diodes, when a voltage Vs is applied to the high potential side electrode with respect to the low potential side electrode, the reverse-blocked state of the Zener diode is placed in a non-breakdown state or breakdown state according to the value of Vs.
Assuming that the Zener voltage of the individual Zener diode is Vz, and the number of p-n junctions constituting the p-n diodes in the spiral thin film layer and placed in a reverse blocked state is m,
(1) when Vs less than mxc2x7Vz (Zener diode is in the non-breakdown state), the leak current Is in the reverse direction of the p-n junction flows through the spiral thin film layer.
The individual Zener diode formed in the highly impurity doped polysilicon provides a leak current Is and a uniform voltage/current characteristic. Therefore, the spiral thin film layer can provide the uniform potential distribution along the spire. By increasing the impurity concentration, the concentration can be easily controlled, thereby reducing a variation in the concentration within a plane and hence in the resistance.
(2) When Vsxe2x89xa7mxc2x7Vz (Zener diode is in the breakdown state), an excessive current flows in a reverse direction of the pn junction. If this state continues for a long time, the spiral thin film layer generates heat and will be broken.
If the number of the Zener diodes is increased so that the sum of the Zener voltages of all the Zener diodes formed in the spiral thin film is higher than a desired withstand voltage of the semiconductor device, the non-breakdown state of the above item (1) can be used. By operating the Zener diodes in this non-breakdown state, the potential distribution of the spiral thin film layer can be made uniform without breaking the Zener diodes. The leak current flowing through the spiral thin film layer depends on the voltage/current characteristic when the Zener diode is reverse-blocked, but not greatly depend on the length of the spiral thin film layer if the number of the Zener diodes is not changed. The change in the leak current due to a temperature change is much smaller than the conventional highly resistive spiral layer, thereby forming a stable potential distribution.
Each of FIGS. 6A to 6C shows the distribution of an electric field along a spiral thin film layer. FIG. 6A is a schematic view of the distribution of an electric field, FIG. 6B is an enlarged view of FIG. 6A and a schematic view of a spiral thin film layer, and FIG. 6C is a graph showing the potential distribution.
As seen from FIGS. 6A and 6B, the electric field becomes Emax at the p-n junctions formed in the spiral thin film layer, whereas at the position to which the depletion layer is not expanded, it becomes Emin. Although there is a small electric field at the areas where the p-n junction is forward-biased, it is not illustrated. Emin refers to the electric field produced by a voltage drop due to the leak current at the position to which the depletion layer is not expanded.
As seen from FIG. 6C, the potential along the spiral thin film layer has a constant gradient from Vs to GND, thereby providing an ideal potential distribution as shown in FIG. 10B. When the potential distribution is scaled up, it falls stepwise. However, because of presence of a large number of Zener diodes, the step is very small.
Where a plurality of thin film layers are formed, even if one of them is blown out, the remaining thin film layer can make the potential distribution uniform.